Embedded Systems Design

Transcription

1 Network of Excellence IST ARTIST2 Design FP6/

2 Emerging needs and trends System-centric approach for Joint Design (HW, SW, Environment) Requires multidisciplinary competences in modeling, components, compilers, middleware, architectures, control, testing and verification Raises difficult fundamental research problems - which are at basis of an emerging theory that will bring together information sciences and the physical sciences

3 Objectives Reinforce and strengthen scientific and technological excellence in Design: The NoE will act as a Virtual Center of Excellence Two levels of integration to create critical mass from selected European teams Strong integration within selected topics by assembling the best European teams, to advance the state of the art in the topic. Integration between topics to achieve the multi-disciplinary excellence and skills required for the development of future embedded technologies. Integration will be around a Joint Programme of Activities

4 Principle of Construction Affiliated Partners Level 2 : Virtual Center of Excellence Level 1 : Clusters/ Topics Team B1 Team A1 Team C2 Team B2 Team A2 Team C1 Cluster I Cluster II Cluster III Level 0 : Teams Team A1 Team B1 Team C1 Team A2 Team B2 Team C2 Core Partner A Core Partner B Core Partner C

5 Selected Topics : ARTIST2 Clusters Control for Hard Real-Time Modeling & Components Compilers & Timing Analysis Execution Platforms Adaptive Real-Time Testing and Verification

6 Essential Topics / Clusters Hard Real-time Albert Benveniste INRIA Alberto Sangiovanni PARADES Paul Caspi Verimag Hermann Kopetz TU VIenna Werner Damm OFFIS Adaptive Real-time Giorgio Buttazzo Pavia Alan Burns University of York Michael Gonzalez - Cantabria Luis Almeida Aveiro Gerhard Fohler Malardalen Juan de la Puente Polytechnic de Madrid Modeling and Components Bengt Jonsson Uupsala François Terrier CEA/LIST Jean-Marc Jezequel INRIA Susanne Graf Verimag Testing & Verification Kim Larsen - Aalborg/ BRICS Ed Brinksma Twente Pierre Wolper Centre Fédéré de Verification Michel Bidoit - LSV Thierry Jeron - INRIA Control Karl-Erik Arzen Lund Martin Torngren KTH Alfons Crespo UP Valencia Vladimir Kucera - Czech TU Compilers, Timing Analysis Reinhard Wilhelm - Saarland Rainer Leupers -Aachen Miguel Santana ST Microelectronics Christian Ferdinand AbsInt Peter Marwedel - Dortmund Puschner, Krall TU Vienna Jakob Engblom - Uppsala Execution Platforms Lothar Thiele ETH Zurich Jan Madsen DTU (TU Denmark) Luca Benini LPOS Petru Eles ESLAB/Liu Rolf Ernst UBR Martin Rem Eindhoven

7 Artist2 Structure

8 Joint Programme of Research Activities (JPRA) Cluster Modelling and Components Cluster Integration JPRA-Cluster Integration Component Modelling and Composition Development of UML for Real-time Hard Real-Time Design Methodology and Flow for Automotive HRT Systems Adaptive Real-Time Compilers and Timing Analysis Execution Platforms Control for Testing and Verification Diagnosis in Distributed Hard Real-time Systems Flexible Scheduling Technologies Adaptive Resource Management for Consumer Electronics Real-time languages Architecture-aware compilation Synergetic Implementation (integrate timing analysis into compilation tools) Communication-centric systems Design-space exploration Design for low power Control in real-time computing Real-time techniques in control system implementations Quantitative Testing and Verification Verification of Security Properties

9 Joint Programme of Research Activities (JPRA) NoE Integration Clusters Hard Real-Time Adaptive Real-Time Control for Embedded Systems Hard Real-time Adaptive Real-time Execution Platforms Control for Embedded Systems Hard Real-Time Adaptive Real-Time Compilers and Timing Analysis; Adaptive Real-Time; Execution Platforms Adaptive Real-Time Modelling and Components Component and Modelling Testing and Verification Testing and Verification Control for Embedded Systems Execution Platforms Compilers and Timing Analysis JPRA NoE Integration Semantic Framework for Hard Real-Time Design Flow Merging the Event-triggered and Time-triggered Paradigms. Adaptive Real-time, HRT and Control. Timing Analysis for Adaptive Real-Time Systems QoS aware Components Predicting Properties of Component-based Systems Verification, Testing, and Control Resource-aware Design

10 Joint Programme of Integrating Activities (JPIA) Sharing Research Platforms, Tools, and Facilities Cluster JPIA - Platform Modelling and Components Platform for Component Modelling and Verification Adaptive Real- Time Testing and Verification A common infrastructure for adaptive Real-time Systems Testing and Verification Platform for Control for Embedded Systems Compilers and Timing Analysis Design Tools for Embedded Control Timing - Analysis Platform. Compilers Platform Execution Platforms System Modelling Infrastructure.

11 Joint Programme of Activities for Spreading Excellence (JPASE) Education and Training Courseware : Achieve a consensus and a unified approach for teaching embedded systems that meets current and future needs for industry and research. Graduate Studies and Summer Schools : Provide support for selected graduate studies programmes and summer schools, organize schools Dissemination and Communication Events: Conferences, workshops, seminars, publication in journals Industrial Liaison Structure and further improve the efficiency of NoE consortium s numerous industrial relations. Specific events for triggering projects, definition of strategic directions, standards.. International Collaboration Joint meetings with leading international experts and institutions from the USA and Asia to define joint research projects, research agenda, standards.