Electronics Engineerin g Year wise : Sanctioned Intake

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Name of the : : Course M.Tech. VLSI Electronics Engineerin g Level UG / PG : PG 1st Year of : 2007 approval by the Council 2013-14 2012-13 2014-15 2015-16 Year wise : 18 18 18 18 Sanctioned Intake Year wise Actual : 06 18 18 18 Admissions Cut off marks : 50% 50% 50% 50% General quota % Students passed : In progress 42.85% 0.045% 15% with Distinction % Students passed with First Class : In progress 85% 64% 75% Students Placed : 1 nil 1 1 Average Pay : 3.25 lacs/yr 2.75 package, Rs.in 3.25 lacs/yr lacs/year lacs/year : ----- 01 r Students opted for -- Higher Studies Accreditation Status course Doctoral Yes / No of : Not Accredited the Courses : Yes, 40 registered, 3 Awarded, 8 Submitted Foreign Collaborations, any if : Professional : ISTE, IETE, IEEE Society Professional activities : Technical Lecture Series by eminent personalities 1) By Dr. Vishal Lichade on Computer Networks on 9-2-12. 2) By Prof. Manish Tiwari on Digital Image Processing

Alumni and applications on 7-2-12. 3) By Prof. Ketan Raut on VLSI Design on 22-8-11. 4) By Prof. Arun Ramteke on Advanced Mobile technology on 11-8-12. 5) By Mr.Sachin Rindhe Infosys on Industry Consultancy activities Grants fetched al Achievements environment & competitions in industrial sectors on 19-09-2014 Industrial Visit at RRSC(Central Amravati Road Nagpur on 5-4-13 Workshop on Tanner Tool Software under IETE. Guest lecture on Recent Technology of Wireless Communication under EXESS Forum & I.I.I. CELL. 1: Infrastructure provided for Summer training program organized by LARE Mumbai from May 3 to May 28 2010. 2: 2 lacs(sdp on Wireless & Mobile Communication) 3: Dr.R.V.Kshirsagar filed a patent on Fault-Tolerant Voter Circuit for TMR Implementation in Digital Circuits., VNIT Nagpur, Sept 2010 Dr.R.V.Kshirsagar fabricated a chip on PhD research work by India Chip Program, sponsored by DIT, Govt.of India Dr. A.P.Rathkanthiwar received the best paper award for her research paper entitled A New timing metric for timing error estimation in OFDM.Published in GWS-13 IEEE held at Atlantic city NJ-USA. Organized various seminars, guest lectures and workshops for faculties and students. PhD Completed -03, PHD Submitted-02,PhD Pursuing - 02 Distinguished 4: Sharda Mungale, Divya Meshram, Md. Nasir, Kapil Kokne, Sonali Dgabale, Tanvi Khobrgade, Gourav Agrawal, Anjali Mishra, Pramod Bokde, Sunil Thool, Atul Sharma, Smita Daware, Rupesh Mahamune.

1. Name of Teaching Staff Designation - Date of Joining the Institution Dr R V Kshirsagar Professor & Vice Principal (On Lien) Electronics Engineering Qualifications with Class Grade Total Experience in Years Papers Published in Journal Papers Presented in conference PhD Guide Give field & University PhDs Projects Guided Books Published IPRs Patents Professional Consultancy Activities Awards 01/08/2002 UG I PG I PhD Awarded Teaching yrs Industry Yrs Research National National International International Field Fault tolerant computing University RTMNU Reconfigurable Architectures VLSI Embedded Systems Computing PhDs undergoing Projects at Masters level ISTE FIETE Outstanding Project in the listing of Altera s Project Competition titled Design Development & Performance Analysis of Gun Carriage Velocity of Bullet Grants fetched using NIOS Processor Filed a patent on Fault tolerant voter circuit for TMR implementation in Digital Circuits Interaction with Professional Institutions Fabrication of a chip sponsored by Dept of Information Technology Govt of India Fellowship grant of Euro for attending VLSI SOC held at NICE France AICTE s grant for conduction of two weeks workshop for faculty 1) Dean Faculty of Engg & Technology RTMNU Nagpur 2) Ex Chairman B O S Electronics Engg RTMNU Nagpur 3) Chairman of LECs for various colleges 4) Subject expert for interviews of lecturers Asstt Prof 5) Reviewer for various national & international conferences

2. Name of Teaching Staff Mrs P J Suryawanshi Designation Assistant Professor Electronics Engineering Date of Joining the : 06/07/2005 Institution Qualifications with Class / Grade Total Experience in : : UG: I Teaching: PG: I Industry: PhD: Research: Years 11.5yrs Papers Published in : National: 00 International: Journal 08 Papers Presented in : National: 13 International: conference 10 PhD Guide? Give field : Field: University: & University PhDs / Projects Guided : PhDs: Projects at Masters level: 13 Books Published / : IPRs/ Patents Professional : ISTE, IETE Consultancy Activities : Awards : Grants fetched : Interaction with : Delivered lectures during SDP, Short Term Training Program, MSBTE Professional Institutions Sponsored CUTP, Judge for paper presentation in Jigyasa 11 & Technovision 2015 at RCOE,Nagpur.

3. Name of Teaching Staff Designation : Mr. U. M. Patel : Assistant Professor : Electronics Engineering : Date of Joining the : 25/05/2015 Institution Qualifications with : UG: II PG: I PhD: Class / Grade Total Experience in : Teaching: Industry: Research: Years 1.6yrs Papers Published in : National: 01 International: Journal Papers Presented in : National: 02 International: conference PhD Guided : Field: University: & University PhDs / Projects Guided : PhDs: Projects at Masters level: Books Published / : IPRs/ Patents Professional : IEI Consultancy Activities : Awards : Grants fetched : Interaction with : Professional Institutions

4.Name of Teaching : Devendra Odal Rapelli : Staff Designation : Assistant Professor : Electronics Engineering Date of Joining the : 22/08/16 Institution Qualifications with : UG: I PG: I PhD: Class / Grade Total Experience in : Teaching: Industry: Research: Years 2 yrs Papers Published in : National: 01 International:4 Journal Papers Presented in : National: 02 International: conference PhD Guided : Field: University: & University PhDs / Projects Guided : PhDs: Projects at Masters level: Books Published / : IPRs/ Patents Professional : IEI Consultancy Activities : Awards : Grants fetched : Interaction with : Professional Institutions