Course Number: CS 130 Course Title: Computer Organization Number of Credits: 3 Instructor Name: Albert Minasyan E-mail address: arm@aua.am Telephone number: 091-92 07 87 Office location: PAB 331W Office Hours: Thu 15:00-16:30, Sat-9:00-11:00 and by appointment Problem solving sessions: Sosi Klejian 306E - Sat-10:00-12:00 Mane Grigoryan 307E - Sat-9:00-11:00 Exclusions: Feb 25: #207E (A) and #307E (B) Mar 18: #206E (A) and #207E (B) Thursdays, 15:00-16:20-208E, Exclusions: March 23 and April 27-214M Term/Year: Spring/2017 Class Schedule: Tu/Th 9:00 AM - 10:15 AM Section A, 10:30 AM - 11:45 AM Section B Prerequisites: CS121 Co-requisites: Teaching Assistants: Mane Grigoryan (Section A), 098-00 35 75, mane_grigoryan@edu.aua.am Sosi Klejian (Section B), 094-67 81 84, sosi_klejian@edu.aua.am Course Description Functional organization and operation of digital computers. Coverage of assembly language; addressing, stacks, argument passing, arithmetic operations, decisions, macros, modularization, linkers, debuggers. Device drivers will be considered. Course Detailed Description The assembly language module covers data representation, instruction formats, addressing modes, stacks / frames, argument passing, arithmetic/logical/decision making/ input-output operations, modularization, compilers, linkers, debuggers, device drivers, system calls, computer datapath and instruction level parallelism. The logic design module covers - combinational logic, Karnaugh maps, circuit analyze, timing diagrams, circuit synthesis, basic and complex logic devices ( gates, latches, decoders, multiplexors, flip-flops, registers, counters)
Students are required to demonstrate intermediate knowledge of software and hardware systems related to computational sciences. Students are required to complete individual projects related to assembly level drivers. Two hours of instructor-led class time per week including discussions and problem sets. Course Materials Required: Textbooks Computer Organization and Design: The Hardware/Software Interface, 5 th _Edition_2014, David A. Patterson (UC Berkeley), John L. Hennessy (Stanford) Digital Design Principles and Practices, John F. Wakerly, 4 th Edition_2006, Stanford Recommended Reference Books: Bradley Kjell, Central Connecticut State University Programmed Introduction to MIPS assembly language - 2015. http://chortle.ccsu.edu/assemblytutorial/index.html The software needed MIPS32 simulator (PC Spim) Logisim or Logicly - Logic design simulators.
Schedule & Topics: Week Topic Reading Non-Reading Home Tasks 1 Computer Architecture. ISA. Assignment 1 Characters Numeration systems review. Character representation. 2 Von Neumann and Harvard models. CPU, Registers, CU, ALU, I/O MIPS assembly instruction formats. 3 Assembler, compiler, interpreter. MIPS simulators. Assembly Syntax. CISC vs RISC. Bitwise logic and Immediate operands. Assignment 2 Binary Instructions 4 Shift Instructions and Logical Instructions. Unsigned numbers. Sign Magnitude. 5 Quiz1. One's complement. Binary Addition and Two's Complement Representation. Integer Addition and Subtraction Instructions. 6 Integers, Characters Input Output. Integer Multiplication, Division, and Arithmetic Shift. Addresses. Memory Access Instructions. Load / Store bytes. Alignment. Endianness. Data section. 7 Mid Term Examination 1 - Assembly 1 Jump and Branch Instructions. Set Instructions 8 The Extended Assembler. The SPIM Trap Handler. Subroutines. Call conventions. Simple convention. Stack based convention. 9 Frame based convention. OS Introduction. Computer System Structures. I/O structure. I/O handling. Poll. Interrupt MIPS I/O driver implementation for console Assignment 3 Bitwise Operations Assignment 4 - Two's complement addition and program Assignment 5 - Memory, Logical, IO Instructions Assignment 6 - Branches cycles Assignment 7 - Menu, Strings, Subroutines
10 Boolean algebra review. Combinational logic. Basic gates. Derived gates. Function minimization. Karnaugh maps. Combinational Circuit Synthesis. Circuit analyze. Signals. Timing diagrams. Race conditions. Propagation delay. 11 Mid Term Examination 2 - Assembly 2 Multiplexer. Decoder. Adders. Simple ALU. 12 Latches Flip flops. Counters, Registers. Assignment 1 - LD Circuit Synthesis Assignment 2 - LD Complex Circuit Synthesis Assignment 8 - Nested Subroutines Stack Based Special Convention, Driver 13 Binary Fractions, Fixed Point, Floating Point. Compiling. Linking. Relocation. 14 Datapath Project. Complex Circuit Synthesis on remote lab RPTB. 15 Pipeline
Learning Objectives and Outcomes Program Goal Program Student Learning Outcomes Course Learning Objectives To provide with knowledge and skills in designing, development and management of efficient computing systems that solve real-life industrial and academic problems. The students completing the course are expected to possess the following skills and abilities: 1. Learn and program in new assembly languages 2. Understand and program interrupt handlers, device drivers. 3. Utilize machine level debugging information when programming low-level operations 4. Recognize and describe various hardware components in digital systems. 5. Design Combinational logic simple blocks. 1. Theory: Introduce the Von Neumann s computer organization and machine level representation of data. Introduce the MIPS specific architecture. 2. Theory: Represent the MIPS assembly language instructions group by group starting from the simplest groups. Addressing modes. 3. Assembly Programming: Teach to assembly programming concepts (subroutines, traps, cycles, stack). 4. Theory: Discuss the logic design principles for combinational logic and memory elements. 5. Logic Design: Teach students to create logic circuits.
Course Structure Instructor-led 75 min class will meet 2 times per week, with homework in accordance with the syllabus. All readings and submissions must be completed on the day due. Method of Evaluation Student learning will be evaluated on the basis of the following weighted components: Homework assignments 20% of final grade Grade of midterm examinations and quizzes 50% Grade of the final comprehensive examination 30% Class attendance and participation Bonus scores. Grading Scale a+ 92-100 a 83-91 a- 75-82 b+ 67-74 b 59-66 b- 50-58 c+ 43-49 c 36-42 c- 30-35 d 21-29 f 0-20
Students work is assessed based on the following rubrics that correspond to learning objectives and outcomes. Topic of assessment: Learning objectives concerning to theory. Theory Rubric. Advanced Proficient Developing Not Competent Fully understands all the components and concepts included in handouts. Understands the problems and figures out the solutions of the topics not included but based on the course handout materials. Fully understands all the components and concepts included in handouts. Partial understanding of the components and concepts included in handouts. Topic of assessment: Learning objectives concerning to programming. Programming Rubric. Does not understand the important components and concepts. Advanced Proficient Developing Not Competent In reasonable terms implement the theoretical knowledge in the programs. Debug and understand the reason of program s wrong behavior on professional level. Make extra efforts and implement more in the programs. In reasonable terms implement the theoretical knowledge in the programs. Debug and understand the reason of program s wrong behavior on professional level. Implement the theoretical knowledge in the programs not fully or not in acceptable terms. Debugging and understanding the reason of program s wrong behavior is done not professionally. Unable to implement the theoretical knowledge in the assembly programs. Poor debugging skills. Topic of assessment: Learning objectives concerning to logic design. Logic Design Rubric. Advanced Proficient Developing Not Competent In reasonable terms create logic circuits with required parameters. Use advanced methods for proving that the circuit works properly. Find the shortest way to perform the task. In reasonable terms create logic circuits with required parameters. Use correct methods for proving that the circuit works properly. Create the logic circuits not fully or not in acceptable terms. Not professional usage of circuit testing methods. Unable to create the logic circuits. Unable to analyze if the circuit works properly or not.
Topic of assessment: Problem Solving Rubric. Advanced Proficient Developing Not Competent Identifies special factors that influence the approach before starting the problem Explains why certain information is essential to the solution Explains why procedures are appropriate for the problem Correct solution of problem with explanations and conclusions Understands the problem Uses all appropriate information correctly Applies completely appropriate procedures Understands enough to solve part of the problem or to get part of the solution Uses some appropriate information correctly Applies some appropriate procedures Correct solution Copying error, computational error, partial answer for problem with multiple answers, no answer statement, answer labeled incorrectly. Doesn't understand enough to get started or make progress Uses inappropriate information Applies inappropriate procedures No answer or wrong answer based upon an inappropriate plan
Class Attendance and Participation Class attendance and participation in discussions are graded as bonus scores. Exams The course will include several mid-term examinations and a final examination. The midterm examinations cover the topics conducted prior the date of the examination. The final examination is comprehensive. All examinations are open book and open electronic devices. The examination questions are specific for each student. Collaboration Policy Discussions on homework assignment questions are encouraged. On the other hand, it is strongly recommended that students work on the homework assignments on their own. If students do collaborate closely with someone on solving some of the questions, then they must state the name of the collaborator on the assignment submission sheet. Similarly, if students find a solution to a question online or in a book, they must state their source. In any case, students must always write the solution in their own words. Failing to do so will be considered a violation of assignment policy. Students will be penalized for violating the collaboration policy depending on the extend of the violation. No collaboration is permitted on the midterm and final exams. Student who are caught cheating on either midterm (whether they are helping a fellow student, being helped by one, or copying material from a cheat sheet) will immediately receive a score of zero on the midterm. Those who are caught cheating on the final exam will receive an F for the course. Late Policy Homework assignments are submitted electronically by email. They must be submitted before the end of the day on the due date (soft deadline). Students who miss the soft deadline are allowed to submit their assignments during a week until the hard deadline. In this case there is a penalty (deducted scores). After hard deadline the works are not accepted. The assignment submission during the allowed periods could be done as many times as students find necessary but only the last submission will be taken into account. The instructor might not penalize the student if the student submits convincing evidence of a medical or other emergency that made completing the assignment at the scheduled time impossible. The final numerical score for the course obtained may or may not be scaled before it is converted to a letter grade. The instructor reserves the right to decide whether or not to scale grades until the very end of the semester.
Make-up Procedures: Students are required to take tests, exams and quizzes when they are scheduled by the instructor. In the event that a student misses a test, exam or quiz, the instructor is under no obligation to give a make-up, unless the student brings convincing, objective evidence that it was impossible for the student to take it at the scheduled time due to a medical or other emergency. Students should give instructors written notice of any absences from tests, exams or quizzes BEFORE the test, exam or quiz. In the event of an unscheduled quiz, the student should have a good reason for absence. If there is no good reason for the absence, it is up to the instructor to decide how or whether to give a make-up exam or take into account the missing work when calculating the final grade. Library and Media Use To enhance their overall learning in the course, students are strongly encouraged to use supplemental online and reference materials available in the library. Policy on Grade Appeal: Students are entitled to appeal grades in line with the university s grade appeal policy which is available online at http://www.aua.am/students/handbook.pdf Standards for Academic Integrity: Students are required to conduct themselves in an academically responsible and ethical manner in line with the AUA Code of Student Ethics. Acts of academic dishonesty (e.g., plagiarism, cheating during tests, copying homework) impair the academic integrity of AUA and create an unfair academic advantage for the student involved and other members of the academic community. These acts are subject to disciplinary measures as prescribed in the AUA Code of Student Ethics (http://www.aua.am/students/student_code_of_ethics.pdf ). Special Needs: Students requiring special accommodations for learning should contact the instructor or Dean by end of Drop/Add period with such requests.